<html><head><meta name="color-scheme" content="light dark"></head><body><pre style="word-wrap: break-word; white-space: pre-wrap;">\noindent
{\bf
CDC CYBER 205
}


\noindent
Company no longer marketed this machine.

\noindent
{\bf
Vector Architecture
}

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aaa\=bbb\=ccc\=  \kill
Architecture:
ECL/LSI logic (168 gates/chip)\\
\&gt;Sequential and parallel processing on single bits, 8-bit bytes and\\
\&gt;\&gt;     32- or 64-bit floating-point operands\\
\&gt; 20-nsec cycle time\\
\vspace{.25in}
\&gt; Scalar Unit\\
\&gt;\&gt;  Segmented functional units\\
\&gt;\&gt;  64-word instruction stack\\
\&gt;\&gt;  256 word high-speed register file\\
\vspace{.25in}
\&gt; Vector Unit\\
\&gt;\&gt;  1, 2, or 4 segmented vector pipelines\\
\&gt;\&gt;  memory-to-memory data streaming\\
\&gt;\&gt;  maximum vector length of 65,536 words\\
\&gt;\&gt;  gather/scatter instructions\\
\&gt;\&gt;  up to 800 million 32-bit floating-point operations/second\\
\vspace{.25in}
\&gt; Memory\\
\&gt;\&gt;  MOS semiconductor memory\\
\&gt;\&gt;  Memory size:  1, 2, 4, 8 or 16 million 64-bit words\\
\&gt;\&gt;  Virtual memory accessing mechanism with multiple, concurrently\\
\&gt;\&gt;\&gt; usable page sizes\\
\&gt;\&gt;  SECDED on each 32-bit half word\\
\&gt;\&gt;  48-bit address (address space of 4 trillion words per user)\\
\&gt;\&gt;  80 nsec memory bank cycle time\\
\&gt;\&gt;  Memory bandwidth:  25.6 or 51.2 Gigabits/second\\
\vspace{.25in}
\&gt; I/O\\
\&gt;\&gt;  Eight I/O ports, 32-bits in width, expandable to 16\\
\&gt;\&gt;  200 Mbits/second for each port\\
\&gt;\&gt;  Maximum I/O port bandwidth of 3200 Mbits/sec\\
\vspace{.25in}
\&gt; Miscellaneous\\
\&gt;\&gt;  Cooling:  freon\\
\&gt;\&gt;  Dimensions:  floor area (four pipe model) 23 ft x 19 ft\\
\&gt;\&gt;\&gt;   footprint (with I/O system) 105 sq ft\\
Software:\\
\&gt; Virtual operating system\\
\&gt; Batch and interactive access\\
\&gt; FORTRAN compiler\\
\&gt;\&gt;  ANSI 77 with vector extensions\\
\&gt;\&gt;  32-bit half-precision data type\\
\&gt;\&gt;  Special calls to machine instructions\\
\&gt;\&gt;  Automatic vectorization\\
\&gt;\&gt;  Scalar optimization utilizing large register file\\
\vspace{.25in}
\&gt; Utilities\\
\&gt; \&gt; Interactive symbolic debugger\\
\&gt;\&gt;  Source code maintenance\\
\&gt;\&gt;  Object code maintenance\\
\vspace{.25in}
Performance:\\
\&gt; Linked triad performance on long vectors approaches asymptotic\\
\&gt;\&gt;  speed of machine.\\
\&gt; Performance can be severely degraded at short vector lengths\\
\&gt;\&gt;  (that is, the typical $n _ {1/2}$ is around 100), and if\\
\&gt;\&gt;  vector is not held contiguously.  For this reason most\\
\&gt;\&gt;  tuned software employs long, contiguously held vectors.
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\noindent
{\bf Contact:}
\begin{flushleft}
ETA Systems, Incorporated\\
1450 Energy Park Drive\\
St. Paul, MN  55108\\
612-642-3400\\

\vspace {.1in}
Charles D. Swanson - Account Support\\

\vspace {.1in}
B. Lawrence\\
Control Data Limited\\
3 Roundwood Avenue\\
Stockley Park\\
Uxbridge\\
Middlesex UB11 1AG\\
England\\
01-848-1919
\end{flushleft}
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